Semiconductor chips, or chip(s), provide complex electrical functions in small packages and are fabricated as part of a larger semiconductor wafer. The individual semiconductor chips are separated from the semiconductor wafer by an operation called "dicing" where the chip is cut along what becomes its peripheral edge. The chips are most familiar in electronic applications, such as microprocessors, but may also be useful as electro-optic devices, for example lasers and light emitting diodes.
The semiconductor wafers are processed through conventional techniques of etching, diffusing and doping to produce the desired functions of the individual chips. Each individual chip has a plurality of contact sites exposed along a major surface of the chip that will become engaged by connection members of another electrical article, such as leads or contacts in a socket, to form electrical connections with the chip. The connection members are prepositioned in the article in an arrangement that corresponds to the contact sites of the chip and then the chip must be positioned so that the contact sites and the connection members correspond during its assembly to the article.
If the contact sites are large relative to the connection members, there is sufficient positioning tolerance available so that the peripheral edges of the chip may be utilized to position the chip. One way of doing so is to create a recess that is located relative to the connection members, so that when the chip is within the recess in the article the contact sites align with the connection members. If the periphery of the chip produced during dicing is undersized, the chip may float within the recess. The greater the dimensional discrepancy, the greater the float, possibly enough so that proper electrical connection may not be reliably established.
Another way of aligning the chip within a recess is described in U.S. patent application Ser. No. 08/098,656 filed on Jul. 28, 1993 by Dimitry Grabbe and Iosif Korsunsky. The recess has two adjacent spring sides which bias the chip against opposite sides that are precisely located relative to the connection members. This configuration accommodates variations in the size of the chip while preventing the chip from floating. However, when the periphery of the chip is formed during dicing operation, the edges may still have enough dimensional variation, relative to the contact sites, that the connection members and contact sites may not align accurately enough for reliable electrical engagement.
The smaller contact sites associated with the latest chip configurations require extremely accurate placement of contact sites relative to the connection members to assure that proper electrical connections occur. The use of the periphery of the chip, as established during production dicing operations, is no longer adequate. One way of overcoming this difficulty is through the use of a computer controlled positioning system that uses interactive vision capability to acquire the images of both the contact pads and the leads and, by correlating those images, properly position the contact sites relative to the connection members. Unfortunately, these systems are expensive and relatively slow, thereby making them impractical for production operations where large quantities of chips must be individually positioned relative to a fixed arrangement of connection members.
As semiconductor chips are becoming a more integral component of electronic devices, and with the advent of multi-chip module technology where numerous semiconductor chips are incorporated into a single module, it is critical that the chips be individually burned-in and tested prior to final assembly. By providing "known good die" or tested semiconductor chips for final assembly, the yield of acceptable devices may be substantially increased. Therefore, the chips must be processed through burn-in within test sockets prior to final assembly into a chip carrier, multi-chip module or other device. This requires the chip to be mated with connection members at least twice--once for testing or burn-in and again for final assembly.
To assure efficient placement of the semiconductor chip, what is needed is a simple, economical and practical means for reliably and precisely positioning the contact sites of a semiconductor chip to mating connection members, such as contacts of a burn-in or test socket or any other device that utilizes a bare chip, whereby positioning the chip assures electrical connection.
Liquid crystal displays or other flat displays are used as output devices in a variety of applications ranging from calculators to home appliances to automobiles dash boards. With ever increasing use of these displays comes a desire to make them larger.
Liquid crystal displays are made using a thin film. In thin film, or any photolythographic process, defects due to pin holes or crystal defects are present. While these defects can be reduced, there remains some statistically predictable distribution of defects over relatively large areas of film. Therefore, the larger the film area, the higher the probability of a defect being present. The presence of a film defect is fatal to a display. The result being that some portion of the display, in the area of the defect, will become inactive. A display comprised of an array of small modules results in fewer defects and a higher yield of usable displays. The defect rate in small modules is less than in a larger film because the probability of a defect increases with area as stated above.
These modules must be precisely aligned with adjacent modules in forming the array so that electrical connections can be made between them using techniques such as wire bonding, ion beam deposition, welding or other suitable methods. One way of achieving precise alignment is through the use of a computer controlled positioning system that uses interactive vision capability to acquire the images of contact sites on adjacent modules and by correlating those images, properly positioning the contact sites relative to each other. This is the same method used for positioning a semiconductor chip described above. It has the same limitations in speed and expense as described above for semiconductor chips.
In order to increase the yield rate in production of displays, what is needed is a simple, economical, and practical means for reliably and precisely positioning of adjacent modules to each other or to a burn in test socket whereby positioning the module assures electrical connection.